Exemplary embodiments relate to a method of programming a nonvolatile memory device and, more particularly, to a method of programming a nonvolatile memory device which is capable of preventing an increase in the distribution of a threshold voltage.
A nonvolatile memory device includes a memory cell array configured to store data. The memory cell array includes a number of cell strings. FIG. 1 is a diagram illustrating interferences occurring when a program operation in a nonvolatile memory device is performed.
Referring to FIG. 1, the memory cell array of the nonvolatile memory device includes a number of cell strings STe and STo. The cell strings STe or STo include a drain select transistor DST, a source select transistor SST, and a number of memory cells F0 to Fn coupled in series between the drain select transistor DST and the source select transistor SST. The drain of the drain select transistor DST is coupled to a bit line BLe or BLo, and the source of the source select transistor SST is coupled to a global source line CSL. The gates of the drain select transistors DSTs, included in different cell strings STe and STo, are coupled together to form a drain selection line DSL. Likewise, the gates of the source select transistors SSTs, included in different cell strings STe and STo, are coupled together to form a source selection line SSL. Furthermore, the gates of the memory cells F0 to Fn, included in different cell strings STe and STo, are coupled together to form word lines WL0 to WLn, respectively.
A program operation on the memory cells of the nonvolatile memory device may be performed in various manners. For example, because the distance between the cell strings is very narrow, an even cell string STe and an odd cell string STo, classified according to their arrangement, are not selected at the same time. Furthermore, after a program operation is performed on a first memory cell 1 selected by the odd cell string STo and the first word line WL0, a second program operation may be performed on second memory cells 2 coupled to the first word line WL0 and the even cell strings STe. Next, a third program operation may performed on a third memory cell 3 selected by the odd cell string STo and the second word line WL1, and a fourth program operation may be performed on fourth memory cells 4 coupled to the second word line WL1 and the even cell strings STe.
Meanwhile, the first memory cell 1 that is first programmed is subject to interference X and Y while the subsequent program operations are performed on the second and third memory cells 2 and 3. Although the first memory cell 1 may be subject to interference while the program operation is performed on the fourth memory cells 4, the interference resulting from the program operations for the second and third memory cells 2 and 3 is the greatest because of the shorter distance.
FIG. 2 is a diagram illustrating a shift in a threshold voltage resulting from interference when a program operation is performed.
Referring to FIGS. 1 and 2, assuming that a distribution of threshold voltages (i.e., state ‘A’) is a target threshold voltage distribution in which interference does not occur, a distribution of the threshold voltage can be gradually widened because of interference, as indicated by X and Y.